Industrial and Computer Science Technology

Magnesium alloys, known for their low density, have garnered interest in weight reduction and efficiency enhancement across various industrial sectors. Nonetheless, their structural application has been hindered by low mechanical strength. Previous studies indicate that incorporating rare earths into magnesium alloys significantly enhances their mechanical strength.

This thesis focuses on the processing and characterization—both microstructural and mechanical—of binary Mg-Gd alloys with Gd concentrations of 1%, 3%, and 6% by mass. The primary objective is to delve into the deformation mechanisms of these alloys and comprehend the specific impact of gadolinium in solid solution, particularly on the twinning mechanism.

Alloys were fabricated via melting and casting in a cylindrical mold, utilizing pure magnesium and a Mg-22%Gd mother alloy (% by mass). Following casting, the materials underwent a thermomechanical treatment involving solubilization and tempering, succeeded by extrusion at 450ºC with an extrusion ratio of 25:1. Subsequently, the extruded bars were quenched to maintain the Gd in solid solution. For comparison purposes, pure Mg underwent the same processing route.

The microstructural characterization of the material in its cast state initially involved Scanning Electron Microscopy (SEM) employing the electron backscatter diffraction (EBSD) technique. This facilitated the acquisition of orientation maps (OIM) and pole figures for the four alloys, aiding in the determination of their crystallographic orientations (texture) and grain sizes. It was confirmed that gadolinium atoms uniformly entered the solid solution, thereby altering the c/a ratio of the primitive cell. Moreover, it was observed that increasing the gadolinium addition led to a more randomized texture and grain refinement. Post-extrusion, the grains exhibited orientation with the basal plane parallel to the direction of extrusion. However, with increased gadolinium content, a randomization of texture occurred, resulting in a more homogeneous distribution of crystallographic orientations within the material.

The mechanical properties were assessed at both room temperature and intermediate temperatures (150°C – 300°C) through various tests:

• Compression Tests: to evaluate the mechanical stability of the alloys based on gadolinium concentration, temperature, and deformation rate. These tests covered temperatures ranging from room temperature to 300ºC and strain rates between 4·10-5 s-1 and 8,3·10-3 s-1.
• In-situ Synchrotron Radiation Tests: to track the evolution of microdeformations during compression tests and identify the families of crystallographic planes responsible for the plastic macrodeformation of the alloys. The tests were conducted at room temperature and 200ºC, with a strain rate of 10-3 s-1.
• Acoustic Emission Tests: to capture and categorize acoustic signals during compression tests. These signals helped in determining the dominant deformation mechanisms at various stages of plastic deformation.

During the compression tests, the presence of periodic fluctuations (serration) in the plastic deformation area was detected, particularly in alloys with a higher concentration of gadolinium in solid solution and only at intermediate temperatures. This serration phenomenon was also evident in the microstrain curves obtained during the in-situ synchrotron tests, particularly in the diffraction peaks {101 ̅0},{0002} and {112 ̅0}. To delve deeper into the serration phenomenon and its impact on microdeformations, an analysis of the diffraction diagrams was conducted. This involved calculating the integrated intensity of the {0002} peak, which governs the macroplastic deformation of the alloys. While twinning emerges as the dominant deformation mechanism throughout the entire temperature spectrum, the presence of Gd impedes this process. It was hypothesized that the serration phenomenon might be linked to the transient anchoring effect exerted by gadolinium atoms on the twins.

During the in-situ characterization via acoustic emission in compression tests conducted at intermediate temperatures, serration was found to correspond to a pronounced intensity in acoustic emission signals, thus confirming the occurrence of interactions during the deformation process. This assertion was validated through a comprehensive analysis of compression curves obtained in the in-situ tests and resultant acoustic emission signal diagrams. Notably, signals emerging concurrently with the fluctuations observed in the compression curves were associated with serration.

The deformed alloys underwent analysis using High-Resolution Transmission Electron Microscopy (HAADF-STEM), facilitated through collaboration with the University of Tokyo. Images obtained through this technique confirmed the segregation of gadolinium atoms in solid solution toward twinning limits. Notably, staggered propagation of twin boundaries was observed in these images.

Upon confirming the correlation between the DSA phenomenon and serration at intermediate temperatures (between 100ºC and 300ºC), as well as the segregation of gadolinium atoms toward dislocations and twinning limits, leading to serration, various parameters were quantified. These included Activation Energy of Serration, Critical Deformation (m + β), and Sensitivity to Deformation Rate, to define optimal conditions (deformation rate, temperature, and gadolinium concentration) for this phenomenon. Following parameter quantification, it was determined that the serration phenomenon occurs between temperatures of 150ºC and 250ºC, and at deformation rates ranging between 4·10-5 s-1 and 8,3·10-3 s-1.

On the other hand, sensitivity to strain rate was also quantified due to the direct relationship between the appearance of the DSA phenomenon and negative sensitivity to strain rate. Compression tests were conducted at temperatures ranging from room temperature to 300ºC, with deformation speeds varying between 10-3 s-1 and 10-4 s-1. The results revealed significant variation in this parameter: positive between room temperature and 100ºC, negative at temperatures between 200ºC and 250ºC, and returning to positive at 300ºC.

The primary conclusions of the study highlight that an increased content of gadolinium in solid solution enhances the mechanical resistance of these alloys across the entire temperature range examined. The principal reinforcement mechanism, particularly at room temperature, is attributed to the solid solution of solute atoms. The integration of in-situ synchrotron radiation diffraction and acoustic emission techniques during mechanical tests has proven crucial in elucidating the simultaneous deformation processes occurring during plasticity in these alloys, both at room temperature and elevated temperatures. The twinning system {101 ̅2}<1011 ̅̅̅̅> emerges as the dominant deformation mechanism during plastic deformation under compression, spanning the entire temperature range investigated. Gadolinium atoms in solid solution exhibit a tendency to impede this mechanism, particularly during the lateral growth stage of twins. Consequently, the volume fraction of twins diminishes with increasing gadolinium concentration, thereby favoring dislocation slip in the basal and non-basal systems as strain increases, particularly in alloys with the highest gadolinium concentration. Furthermore, at intermediate temperatures, the appearance of the serration phenomenon associated with Dynamic Strain Aging (DSA) has been confirmed.

• 2018:
  Garces, Gerardo, Pablo Pérez, Rafael Barea del Cerro, Bryan W. Chávez, Judit Medina, y Paloma Adeva. «Evolución microestructural y envejecimiento dinámico por deformación en la aleación Mg-6%Gd- 1%Zn durante ensayos a tracción y compresión a temperaturas intermedias». Revista de metalurgia 54, n.º 3 (2018): 124. https://doi.org/10.3989/REVMETALM.124
• 2020:
  Chávez, Bryan W., Gerardo Garces, Pablo Pérez, Rafael Barea del Cerro, y Paloma Adeva. «Dynamic Strain Aging (DSA) in solid solubilized Mg-Gd alloys under compression at intermediate temperatures». Revista de metalurgia 56, n.º 3 (2020): 175. https://doi.org/10.3989/REVMETALM.175
• 2021:
  Garces, Medina, Chávez, Perez, Barea, Stark, Schell, y Adeva. «Load Partitioning Between Mg17Al12 Precipitates and Mg Phase in the AZ91 Alloy Using In-Situ Synchrotron Radiation Diffraction Experiments». Metallurgical and Materials Transactions A: Physical Metallurgy and Materials Science 52, n.º 7 (2021): 2732-45. https://doi.org/10.1007/S11661-021-06258-W

Steel, prized for its exceptional mechanical properties, stands as a cornerstone material in civil and mechanical engineering, finding extensive application in structures like buildings, bridges, railway infrastructure, and vehicles.

Preserving the structural integrity of steel-based constructions hinges upon staying within the material's elastic limits. In scenarios where external loads undergo substantial changes, particularly critical instances, assessing the internal stress of structures becomes imperative to ensure their safety and durability. These internal stresses fluctuate during the structure's service life due to load variations, thermal expansions, oxidation, and other environmental factors.

Hence, the demand for non-intrusive 'in situ' methods to measure internal stress emerges, crucial for averting potential failures and elongating the structure's useful lifespan. The incorporation of a non-invasive, continuous monitoring system for gauging the tension in steel structures would confer a significant advantage. This system could track stress evolution, indicating when structural intervention becomes necessary.

This research centers on the creation of sensors utilizing magnetic methods, specifically focusing on magnetostatic and magnetoelastic techniques. Ferromagnetic materials, the primary steels tested throughout this thesis, possess inherent properties that render them promising for stress monitoring:

• The magnetic characteristics of ferromagnetic materials exhibit high sensitivity to mechanical stress, primarily due to a phenomenon known as magnetostriction. Application of stress to a ferromagnetic substance induces notable alterations in its magnetic attributes, including the magnetization curve or hysteresis loop. Consequently, assessing the magnetic properties of a ferromagnetic material provides insights into its state of tension. Previous studies have demonstrated significant variations in the magnetic properties of steels used for rail manufacturing when subjected to mechanical stresses. Specifically, stress levels around 100 MPa have led to up to 10% variations in certain magnetic parameters.
• Measurement of a material's magnetic properties can be conducted externally without the need for integrating sensors within the structures themselves. This simplifies the process of assessing these properties and paves the way for the development of external systems capable of measuring stress at critical points within structures.

The initial method employed revolves around measuring internal voltage changes via static magnetic fields, specifically focusing on the measurement of the magnetostatic field. The resultant device is a straightforward, cost-effective, and non-invasive magnetic sensor designed to detect internal stress fluctuations within steel components.

The second approach utilized is the magnetoelastic method, which similarly results in the creation of a straightforward and economical sensor. Comprising two coils—an acting primary coil and a secondary one—the sensor’s potential application could prove highly beneficial, notably in railway infrastructure. Specifically, it could aid in the detection of rail buckling, a critical issue due to its severe consequences. The sensors examined in this study possess simplicity, resilience, and cost-effectiveness—essential qualities for viability. Considering the necessity for a large quantity of sensors to monitor extensive areas and their exposure to outdoor conditions, including temperature fluctuations and adverse weather, such characteristics are pivotal.

• M. S. García Alonso F. Giacomone, A. Pérez, I. Kaiser, J. F. Fernández, A. Hernando, J. Vinolas, and M. A. García "Magnetostatic determination of variations of internal stress in magnetic steels", AIP Advances 10, 115302 (2020); https://doi.org/10.1063/5.0004448
• M. S. García Alonso, A. Hernando, J. Vinolas, and M. A. García, "Magnetic detection of high mechanical stress in iron-based materials using eddy currents and phase shift measurements" J. Appl. Phys. 129, 243901 (2021); doi: 10.1063/5.0050402

Transport companies face new challenges related to sustainability, energy efficiency and cost reduction that are reflected in their strategic plans, especially in the field of urban freight distribution. Replacing the vehicles in a delivery fleet with more sustainable vehicles is one of the most-used measures by logistics companies. Currently, in Spain, battery electric vehicles and those powered by natural gas are the propulsion systems most used to reduce carbon footprint and optimize costs. However, hydrogen fuel cell propulsion technologies for delivery vans will become available in the near future, expanding the range of sustainable options. However, electric vans, depending on the type of propulsion system used, have operational limitations related to autonomy, recharging time, energy supply infrastructure, and lack of experience in their performance or economic viability. In this thesis, an optimization model has been developed to assist logistics companies in the decision process that is carried out for the replacement of vehicles in a fleet, taking into account the distinctive features of electric propulsion systems and the specific requirements of the urban distribution of goods, as well as the installation of the necessary infrastructure for the supply of energy to the vehicles that make up the fleet. The model is capable of determining the optimal composition of the fleet throughout the established planning horizon, the cost structure of the fleet (CAPEX and OPEX), the corporate emissions inventory broken down by scope and the cost and emissions per kilometer. Likewise, the sensitivity and break-even analyses carried out in the research have made it possible to evaluate the influence of the different economic, operational and environmental aspects used in the model. The results obtained indicate that vans with electric propulsion, especially battery electric and electric hybrids that use a hydrogen fuel cell as a range extender, are capable of replacing internal combustion vans powered by natural gas, obtaining a reduction of costs and a lower environmental impact. Research has revealed the economic, environmental and refueling infrastructure aspects that are key to determining when one powertrain is more competitive than another from an emissions and cost-per-kilometer standpoint.

• Castillo, O., Álvarez, R., Domingo, R. (2020). Opportunities and Barriers of Hydrogen–Electric Hybrid Powertrain Vans: A Systematic Literature Review. Processes. https://doi.org/10.3390/pr8101261
• Castillo Campo, Ó., Gayoso Martínez, V., Hernández Encinas, L., Martín Muñoz, A., Álvarez Fernández, R. (2022). State of the Art of Cybersecurity in Cooperative, Connected and Automated Mobility. In: , et al. International Joint Conference 15th International Conference on Computational Intelligence in Security for Information Systems (CISIS 2022) 13th International Conference on European Transnational Education (ICEUTE 2022). CISIS ICEUTE 2022 2022. Lecture Notes in Networks and Systems, vol 532. Springer, Cham. https://doi.org/10.1007/978-3-031-184093_11
• Castillo, O., Álvarez, R. (2022). Economic optimization analysis of different electric powertrain technologies for vans applied to last mile delivery fleets. Journal of Cleaner Production https://doi.org/10.1016/j.jclepro.2022.135677

En los últimos años el estudio de sistemas EHSA (Energy Harvesting Shock Absorber) ha sido desarrollado de forma amplia y aparece como una solución viable para la recuperación de energía en sistemas de suspensión. Sin embargo, los trabajos realizados hasta la fecha se realizan en condiciones de prueba y con prototipos de laboratorio, no habiendo llegado de forma exitosa a los vehículos de calle. En la actualidad no existe una metodología probada que permita comparar los distintos sistemas EHSA presentados hasta la fecha, por lo que se vuelve indispensable plantear una serie de normas y pasos que permitan establecer condiciones similares para comparar de forma justa los sistemas y tener elementos de decisión en cuanto a la mejor opción. Así, tras el análisis de los distintos modelos y trabajos existentes en la bibliografía, con distintos grados de libertad, condiciones de terreno, entradas de excitación; se propone en este trabajo una metodología que permita estudiar dichos sistemas en condiciones equiparables.

Por otro lado, los sistemas EHSA aplicados a suspensiones deben responder a los requerimientos mínimos de un amortiguador automotriz, basada en parámetros como tipo de carretera, tipo de vehículo y manufactura del amortiguador con valores promedio del factor de amortiguador entre 1 y 5 kN, con estos parámetros se asegura cumplir con las demandas mínimas de confort y seguridad en una suspensión automotriz. Por lo que, una muy buen primera aproximación es alcanzar las prestaciones de esta suspensión comercial con un sistema EHSA. Por lo tanto, en este trabajo se profundiza en emular a través de un husillo de bolas una suspensión comercial explorando diferentes estrategias electrónicas de ajuste para obtener las mismas prestaciones en cuestión de seguridad y confort. Una de las dificultades para la adopción de los sistemas EHSA es que es necesario sustituir todo el sistema de suspensión de los vehículos actuales. En este sentido, la presente tesis propone el uso de un sistema EHSA basado en cuatro barras que puede instalarse en paralelo con cualquier sistema de suspensión, con pequeños cambios, permitiendo una recuperación de energía constante, a la vez que el sistema de recuperación de energía de cuatro barras (Four Links vi Energy Harvesting Shock Absorber) muestra ventajas sobre otros sistemas EHSA, principalmente por su facilidad de montaje, de esta forma resulta de interés modelar, simular e implementar el sistema en un vehículo comercial como un sistema alterno en la recuperación de energía, lo que representa una opción de fácil montaje en vehículos comerciales como un sistema híbrido entre el sistema convencional y el sistema de eslabonamiento con un ajuste de parámetros basados en la metodología propuesta.

A través de pruebas en banco nos permitieron validar la viabilidad del sistema EHSA para posteriormente realizar pruebas en un vehículo comercial.

Podemos decir que en este trabajo de tesis se ha hecho mucho énfasis en el método para asegurar que la implementación permita la menor cantidad de iteraciones para alcanzar un objetivo establecido con elementos de innovación.

• Gijón-Rivera, C., Olazagoitia, J.L. (2020). Methodology for Comprehensive Comparison of Energy Harvesting Shock Absorber Systems. Energies 2020, 13(22), 6110.
• Reyes-Avendaño, J.A.; Moreno-Ramírez, C.; Gijón-Rivera, C.; González-Hernández, H.G.; Olazagoitia, J.L. (2021). Can a Semi-Active Energy Harvesting Shock Absorber Mimic a Given Vehicle Passive Suspension? Sensors 2021, 21, 4378.

In space applications, radio communications are a vital technology for the transmission of data back to ground level, and of these the QPSK modulation scheme has been used in some applications, with trends towards more flexible systems such as software-defined-radio. As such the modulation components have been gradually shifting from the analogue space to the digital space, with recent years showing increases of FPGA based implementations of these systems, enabling an even greater degree of flexibility.

Lately, commercial off-the-shelf (COTS) based satellite systems have been increasing in use, particularly in smaller satellites, where financial, power and area budgets are limited. A current trend in these COTS components is to increase component density and functionalities. This however, makes the devices more susceptible to the effects of radiation-induced errors caused by ionising radiation which is prevalent in the space environment. Energetic particles can collide with the device transistors and can lead to effects such as single event upsets (SEUs) which is an error that modifies the memory cells. Without design consideration regarding these effects, COTS components cannot be used by themselves.

The effects of radiation can be mitigated using costly manufacturing processes. However, low-cost COTS based projects likely cannot afford these expensive pieces of hardware, therefore a radiation hardening by design approach is usually followed. For short development times and large designs, a modular redundancy technique can be used, which is a general approach but uses a large amount of area and power resources. however, the general approaches are not always feasible, therefore another option is to study the system's properties and behavior to devise ad-hoc protection schemes with lower overhead.

It is this method that is being proposed in this thesis: a modular approach is taken in that the design is broken up into small sub-components, with each considered individually to design novel custom ad-hoc radiation protection techniques combined with traditional solutions, of a QPSK-based transceiver, implemented in COTS hardware.

The proposed protection techniques presented are:

• An ad-hoc protection for the QPSK Modulator system exploiting the trigonometric properties of the system output.
• An ad-hoc protection technique for the QPSK demodulator using a reduced DMR and trigonometric based protections of a CORDIC based DDS system.
• An ad-hoc protection technique for a CIC interpolator (up-conversion) which calculates the predicted output in parallel to the main circuit.
• An ad-hoc protection technique for a CIC interpolator that analyses the filter output.
• An SEU accumulation error prevention scrubbing technique, utilizing novel testing methodologies, which scrubs FPGA configuration memory based on the potential for causing errors, when SEUs exist but cause no observable error.

These techniques have been developed to provide a trade-o_ between the resource overhead required for introducing soft error mitigation and the end result of error detection rate.

The effectiveness of the above techniques have been evaluated through extensive testing including fault injection campaigns, and in terms of resource usage and error detection rate.

The scrubbing methodology has been verified by using an FPGA based design to provide data, and a computer simulation to explore the effects and performance. The construction of the QPSK based transceiver is used as an example of how to build up the final system combining a flexible set of traditional techniques and novel ad-hoc approaches.

• Gear, K. W., Sánchez-Macian, A., Garcia-Herrero, F. & Maestro, J. A. (2020), 'Two Behavioural Error Detection Techniques for the Cascaded Integrator-Comb Interpolation Filter Implemented on FPGA', Circuits, Systems and Signal Processing 39(11), 5529-5542.
• Gear, K. W., Sánchez-Macián, A. & Maestro, J. A. (2021), 'Reduced Length Redundancy Adaptive Protection for the Cascaded Integrator-Comb Interpolation Filter on FPGA', Microelectronics Reliability 118, 114043.
• Gear, K. W., Sánchez-Macián, A. & Maestro, J. A. (2022), 'An Analysis of FPGA configuration Memory SEU Accumulation and a Preventative Scrubbing Technique', Micro- processors and Microsystems 90, 104467.

In recent decades, new hardware requirements and data processing challenges have arisen with the massive increase of small and portable electronic devices for IoT, Industry 4.0, and nanosatellites. On the one hand, the devices require low-power consumption due to their small form factor; on the other hand, the onboard data processing must be fast enough to attend to the tasks without significant delay in communication. However, this is a difficult challenge today since most portable devices only have a general-purpose processor with a limited and small instruction set. Therefore, full-custom HW architectures are still used in complex and critical applications in these portable devices, but at the expense of more logic utilization and power consumption in our design.

Taking advantage of the hardware reconfiguration capacity of FPGAs, it is possible to disable the components we are not using in real-time and, in this way, decrease the power consumption of the whole system. Additionally, operational costs can be significantly reduced, and the flexibility of the nodes to adapt to future heterogeneous standards and communication protocols can be improved. Therefore, applications tend to migrate from ASICs due to all the benefits mentioned above. However, ASICs are still better than FPGAs in some aspects, and engineers must make much effort to reduce the gap between them to make the FPGAs feasible to implement architectures in these devices.

Therefore, this thesis explores the possibility of executing specific applications and algorithms on top of customized soft-core processors without needing full-custom HW architectures and, simultaneously, meeting the real-time constraints that traditional general-purpose processors cannot afford. In this way, power consumption can keep as low as possible in these portable devices since we are not introducing additional HW for each specific task.

Critical contributions and solutions have been made in this thesis to solve all the challenges in future communication networks, identifying the main bottlenecks in applications such as classical cryptography, PQC, and ECCs, which are essential in every small and portable device today.

En las últimas décadas, han surgido nuevos requisitos de hardware y desafíos de procesamiento de datos con el aumento masivo de dispositivos electrónicos pequeños y portátiles para IoT, Industria 4.0 y nanosatélites. Por un lado, los dispositivos requieren un bajo consumo de energía debido a su pequeño factor de forma; por otro lado, el procesamiento de datos a bordo debe ser lo suficientemente rápido para atender las tareas sin demoras significativas en la comunicación. Sin embargo, este es un desafío difícil hoy en día, ya que la mayoría de los dispositivos portátiles solo tienen un procesador de uso general con un conjunto de instrucciones pequeño y limitado. Por lo tanto, las arquitecturas de HW completamente personalizadas todavía se usan en aplicaciones críticas y complejas en estos dispositivos portátiles, pero a expensas de una mayor utilización de lógica y consumo de energía en nuestro diseño.

Aprovechando la capacidad de reconfiguración hardware de las FPGAs, es posible deshabilitar en tiempo real los componentes que no estamos usando y, de esta forma, disminuir el consumo de energía de todo el sistema. Además, los costos operativos se pueden reducir significativamente y se puede mejorar la flexibilidad de los nodos para adaptarse a futuros estándares heterogéneos y protocolos de comunicación. Por lo tanto, las aplicaciones tienden a migrar desde los ASICs debido a todos los beneficios mencionados anteriormente. Sin embargo, los ASICs siguen siendo mejores que las FPGAs en algunos aspectos, y los ingenieros deben hacer un gran esfuerzo para reducir la brecha entre ellos para que las FPGAs sean atractivas como plataforma de implementación.

Por lo tanto, esta tesis explora la posibilidad de ejecutar aplicaciones y algoritmos específicos sobre procesadores soft-core personalizados sin necesidad de arquitecturas HW full-custom y, al mismo tiempo, cumplir con las restricciones de tiempo real que los procesadores tradicionales de propósito general no pueden permitirse. De esta manera, el consumo de energía puede mantenerse lo más bajo posible ya que no estamos introduciendo HW adicional para cada tarea específica.

En esta tesis se han diseñado arquitecturas para aplicaciones críticas de las futuras redes de comunicación, identificando los principales cuellos de botella en aplicaciones como la criptografía clásica, post-cuántica y sistemas de corrección de errores modernos, que son esenciales en todo dispositivo pequeño y portátil en la actualidad.

• Y. -M. Kuo, F. Garcia-Herrero, O. Ruano and J. A. Maestro, "RISC-V Galois Field ISA Extension for Non-Binary Error-Correction Codes and Classical and Post-Quantum Cryptography," in IEEE Transactions on Computers, doi: 10.1109/TC.2022.3174587.
• Yao-Ming Kuo, Francisco Garcia-Herrero, Oscar Ruano, Juan Antonio Maestro, Flexible and area-efficient Galois field Arithmetic Logic Unit for soft-core processors, Computers and Electrical Engineering, Volume 99,2022,107759,ISSN 0045-7906.
• Y.-M. Kuo, F. Garcia-Herrero, and J. A. Maestro, “Versatile risc-v isa galois field arithmetic extension for cryptography and error-correction codes,” 2021.

Desde el inicio de la carrera espacial, la informática y la electrónica que forman parte de este sector han experimentado un gran y rápido avance, convirtiéndose además en una pieza importante de las misiones actuales. No obstante, a medida que esta tecnología ha evolucionado, también lo han hecho los retos a los que tiene que enfrentarse como por ejemplo, los errores producidos por la radiación cósmica. Es por esto, que nuevas y eficientes técnicas de protección son necesarias en los citados sistemas para hacer posible su correcto funcionamiento en un entorno espacial.

Tradicionalmente, esta tarea se ha realizado mediante procesos de fabricación que crean versiones protegidas de los transistores y otros elementos que componen la plataforma electrónica. A este proceso se le conoce como protección (RadHard). Esta técnica da buenos resultados de fiabilidad pero es costosa de fabricar, lo que implica que solo las agencias espaciales y las grandes corporaciones que dispongan de un presupuesto holgado, pueden acceder a ella. Este motivo económico impide por tanto a universidades, centros de investigación y otras instituciones el poder desarrollar sus propias investigaciones espaciales. Como respuesta a este impedimento, en los últimos años ha surgido una nueva alternativa a la fabricación RadHard, que consiste en usar componentes comerciales adaptados a las necesidades del sector espacial mediante técnicas de protección ad-hoc. El uso de esta tecnología conocida como “Commercial-Off-The-Shelf” (COTS), ha supuesto un gran cambio en el diseño electrónico espacial debido al abaratamiento de los costes de diseño y fabricación. Gracias a esto, la barrera económica que impedía a universidades y centros de investigación crear sus propias misiones espaciales está siendo superada. Esto ha propiciado la aparición de nuevas aplicaciones como los satélites de bajo coste del tipo “Nanosat” y los “Picosat”.

Existen dos formas de implementar el diseño de un circuito electrónico. La primera forma es fabricar un chip en silicio según la especificación. Este circuito recibe el nombre de “Application-Specific Integrated Circuit” (ASIC). La segunda opción es usar una plataforma programable como por ejemplo una “Field Programmable Gate Array” (FPGA). Este dispositivo está formado por celdas que implementan funciones lógicas, así como memorias y otros elementos electrónicos que implementan la función lógica de un circuito descrito mediante un lenguaje de diseño hardware o “Hardware Description Language” (HDL). Las FPGAs destacan frente a los “ASIC” en que son programables, lo que permite modificar el diseño del circuito para hacerlo tolerante a fallos, actualizarlo una vez cargado y reducir el tiempo necesario de implementación. Todas estas características evitan tener que construir un chip en silicio (ASIC), abaratando por tanto los costes.

Los microprocesadores son una parte crucial en cualquier misión espacial. Desde la carga propia de la misión como pueda ser el instrumental científico, hasta los sistemas de navegación, pasando por los de comunicación con la Tierra, los microprocesadores son usados para múltiples funciones. Existen dos tipos de microprocesadores: los “Soft-Core” o “Soft Processor”, que implementan en una FPGA un diseño descrito en “HDL” y los “Hard Processor”, fabricados en un ASIC. Aquellos que son sintetizados en un dispositivo programable, se ven beneficiados por las ventajas anteriormente mencionadas de las FPGAs, como por ejemplo, la opción de personalización del diseño según las necesidades de la aplicación, o la capacidad de exportación de este a otra placa. Dichos procesadores, igual que cualquier elemento electrónico en un vehículo espacial, deben ser protegidos frente a los efectos adversos de la radiación. Esta protección puede realizarse mediante el uso de una FPGA RadHard, mediante una modificación del diseño, o mediante la combinación de ambas técnicas para lograr una protección mayor.

La presente tesis aborda el uso de los microprocesadores embarcados en misiones espaciales en FPGAs de tipo comercial, tomando como caso de estudio un “soft processor” de arquitectura RISC-V. Esta arquitectura se distingue por ser abierta, lo que facilita y abarata el desarrollo de un diseño, que junto a otras características propias de ella, la convierte en una candidata ideal para este trabajo. El microprocesador utilizado en los procesos experimentales ha sido implementado en una FPGA. La aportación de la presente tesis radica en dos aportaciones: la primera, en la caracterización de un “soft processor” de arquitectura RISC-V frente a errores aislados para determinar su tolerancia a fallos. La segunda, en la propuesta de dos técnicas de protección de los componentes del microprocesador anteriormente analizado, que usando las ventajas de la implementación en un dispositivo programable, protege dichos módulos de una forma más eficiente que otras soluciones.

• Revistas indexadas en JCR:
  • A. Ramos, A. Ullah, P. Reviriego, and J. A. Maestro. “Efficient Protection of the Register File in Soft-Processors Implemented on Xilinx FPGAs”. In: IEEE Transactions on Computers 67.2 (Feb. 2018), pp. 299–304. ISSN: 0018-9340. DOI: 10.1109/TC.2017.2737996
  • A. Ramos, J. A. Maestro, and P. Reviriego. “Characterizing a RISC-V SRAM-based FPGA implementation against Single Event Upsets using fault injection”. In: Microelectronics Reliability 78 (Nov. 2017), pp. 205–211. ISSN: 0026-2714. DOI: 10.1016/j.microrel.2017.09.007

Debido a la continua miniaturización de los componentes electrónicos, su susceptibilidad frente a soft errors inducidos por radiación ha ido aumentando durante los últimos años. Este obstáculo es de vital importancia para el uso de estos elementos en aplicaciones espaciales, ya que se encuentran expuestos a numerosas fuentes de partículas radiactivas. Para compensar esta carencia, a lo largo de los años se han desarrollado numerosas técnicas de tolerancia a fallos. Estas soluciones se clasifican habitualmente en técnicas de prevención de fallos, que emplean componentes resistentes a radiación para prevenir la ocurrencia de errores, y técnicas de mitigación de fallos, que hacen uso de funciones lógicas para detectar o corregir los errores una vez que se han producido. La efectividad de las primeras se está viendo reducida con los avances tecnológicos, mientras que las últimas tienen un efecto considerable en el retardo, el área y el consumo energético del sistema.

El consumo energético es otro de los grandes desafíos de la electrónica en la actualidad. Debido al auge de los dispositivos alimentados por baterías, la reducción del consumo medio de los circuitos ha adquirido una importancia capital. Esta situación es especialmente relevante para sistemas espaciales, donde la disponibilidad de fuentes de energía es escasa. Dado el reciente interés en el uso de nanosatélites, la importancia de diseñar circuitos capaces de operar a bajo consumo ha aumentado aún más, ya que un factor limitante para estos vehículos es precisamente el consumo. Desgraciadamente, los circuitos que se encuentran en estos satélites también deben contar con medios de protección contra radiación para garantizar el éxito de la misión.

En esta tesis se evaluará la condición de equilibrio establecida entre área y consumo en registros tolerantes a fallos. A través de un estudio preliminar de varias técnicas de mitigación de soft errors cuyas características son representativas del conjunto, el conocimiento necesario para determinar la efectividad de cada técnica será adquirido.

Este conocimiento será luego empleado para proponer dos metodologías novedosas destinadas a reducir el consumo energético en registros tolerantes a fallos. La primera de estas se centra en alcanzar una solución de compromiso entre el retardo, el área y el consumo energético que permita al diseñador adaptar la protección del sistema a los requerimientos de diseño. Esta metodología emplea únicamente el número de biestables a proteger y la actividad de cada uno de estos para proponer una solución alternativa.

La segunda metodología expone la importancia del orden de las entradas de un código de corrección de errores en su consumo energético medio. Basándose en la descripción a nivel de registros y de puertas del sistema, se proponen una serie de pasos a ejecutar para reducir la actividad global del diseño. Aplicando estos pasos, las entradas al codificador se reordenan de forma rápida para reducir el consumo medio del diseño, lo que hace esta metodología adecuada para su uso en registros en sistemas complejos.

A través de la comprensión previamente adquirida del consumo en registros tolerantes a fallos, se ha desarrollado un estimador de área y consumo para estos sistemas. Este estimador utiliza como entradas la longitud del registro y la actividad media de sus entradas, y proporciona como salidas una estimación del área y el consumo de este registro protegido empleando varias técnicas de tolerancia a fallos. La evaluación de los resultados muestra que los valores predichos por el estimador cometen un error relativo de menos del 5% respecto a los valores determinados a través de la síntesis y simulación del circuito, mientras que el tiempo necesario para obtener estos se ve enormemente reducido.

• Revistas indexadas en JCR:
  • R. González Toral, P. Reviriego, J.A. Maestro and C. Argyrides, "A Fast Technique to Reduce Power Consumption on Linear Block Codes Used to Protect Registers", IEEE Transactions on Device and Materials Reliability (ISSN: 1530-4388), 2018 (in press).
  • R. González Toral, P. Reviriego, J.A. Maestro and Z. Gao, "A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-based FPGAs", IEEE Transactions on Computers (ISSN: 0018-9340), 2018 (in press).
  • R. González Toral, P. Reviriego, S. Liu and J.A. Maestro, “Reducing the Power Consumption of Fault Tolerant Registers Through Hybrid Protection", IEEE Transactions on Circuits and Systems I: Regular Papers (ISSN: 1549-8328), vol. 65, no. 4, pp. 1293-1302, April 2018.
• Congresos:
  • R. González Toral, P. Reviriego, J.A. Maestro and Z. Gao, "A Novel Concurrent Error Detection Technique for the Fast Fourier Transform Implemented in SRAM-based FPGAs", Proc. of the RADECS 2016 conference, Bremen (Germany), September 2016.

Star trackers are autonomous, high-accuracy electronic systems used to determine the attitude of a spacecraft. Typical star tracker systems can weigh from 1 to 7 kilograms and consume up to 15 watts of power. These technical specifications imply a high demand of weight and power that small spacecraft such as picosats or CubeSats cannot afford. Therefore, classic star trackers are not yet suitable for these smallsat applications.

In recent years, Commercial Off-The-Shelf (COTS)-based star trackers are growing in importance for low-cost and short-duration missions due to the emergence of the previously mentioned small-size spacecraft. The current trend in COTS electronic devices is to increase component density and functionalities, so they are interesting alternatives to implement complex attitude determination algorithms. However, electronics miniaturization also makes these devices more susceptible to radiation-induced errors caused by ionizing radiation. Energetic particles can collide with the transistors of the device leading to e.g. Single-Event Upsets (SEUs), a type of error that modifies the value of a memory cell. Consequently, COTS components are not fully prepared to operate in space applications.

In order to mitigate these radiation effects in electronic devices, expensive manufacturing processes can be used. However, this approach is inconsistent with low-cost COTS-based projects, so a Radiation Hardening by Design (RHBD) approach is usually followed. Typically, when the complexity and heterogeneity of the system that is going to be implemented in the COTS component is high, classic protection schemes based on modular redundancy are chosen to shorten development times.

The main drawbacks of the previously mentioned approaches are related to the high resource usage and power consumption. In this thesis, a divide-and-conquer approach combined with ad-hoc protection techniques is presented to create a fault tolerant image processing system of a COTS-based star tracker. The image processing system has been divided into smaller and less complex modules with homogeneous properties that have been protected using custom techniques. These techniques have been developed to obtain the right balance between the resource overhead added to the unprotected design and the final error detection/correction rate achieved.

The effectiveness of the combined strategy proposed in this thesis has been validated creating a completely functional image processing system of a star tra-cker. The protected system has been evaluated in terms of resource usage, error detection rate, and reconfiguration rate obtaining positive results. The number of undetected errors achieved is similar to classic redundancy-based approaches, but it uses fewer FPGA resources and requires fewer unnecessary reconfigurations. Moreover, the effect of the undetected errors has been measured to verify that they do not heavily affect the subsequent star identification algorithms. Therefore, it can be concluded that the proposed ``divide-and-conquer'' approach combined with ad-hoc protection techniques can be used to adapt the fault tolerance of a complex system to the mission requirements. In particular, a fault tolerant image processing system based on COTS components has been successfully designed and implemented using this approach.

• Revistas indexadas en JCR:
  • L. A. Aranda, P. Reviriego, and J. A. Maestro, "A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response (FIR) Filters Implemented in SRAM-based FPGAs through Fault Injection", IEEE Transactions on Circuits and Systems II (ISSN: 1549-7747), Vol. 65, No 3, March 2018, pp. 376-380.
  • L. A. Aranda, P. Reviriego, and J. A. Maestro, "Error Detection Technique for a Median Filter", IEEE Transactions on Nuclear Science (ISSN: 0018-9499), Vol. 64, No 8, August 2017, pp. 2219-2226.
  • L. A. Aranda, P. Reviriego, R. G. Toral, and J. A. Maestro, “Protection Scheme for Star Tracker Images,” IEEE Transactions on Aerospace and Electronic Systems, 2018 (in press).
• Congresos:
  • L. A. Aranda, P. Reviriego, and J. A. Maestro, “A Fault-Tolerant Implementation of the Median Filter,” in Proc. of the RADECS 2016 Conf., Bremen (Germany), September 19-23, 2016.
  • L. A. Aranda, P. Reviriego, and J. A. Maestro, “Design Placement Guidelines for Single Event Upset (SEU) Minimization in SRAM-based FPGAs,” in XXXII Conf. on Design of Circuits and Integrated Systems (DCIS), Barcelona (Spain), November 22-24, 2017.

Esta tesis contiene un estudio del estado del arte sobre los EHSAs (Energy Harvesting Shock Absorbers) exhaustivo, clasificando cada una de las tecnologías que se presentan en la literatura según el principio de funcionamiento. Se muestran datos de la potencia de los sistemas desarrollados por cada autor, así como también sus eficiencias, su fuerza de amortiguamiento o sus coeficientes de amortiguamiento.

Los estudios llevados a cabo dentro del contexto de esta tesis están centrados, primero, en plantear una metodología que permita comparar las distintas tecnologías existentes, entre sí.

En segundo lugar, aplicando esta metodología a los sistemas que mayor impacto han tenido en la literatura, se proponen modelos matemáticos y computacionales para su posterior simulación. En estos modelos se analizan las deficiencias y virtudes de cada sistema lo que permite plantear una propuesta alternativa a las presentadas en la bibliografía.

• L. Bowen, J. Vinolas, and J. L. Olazagoitia, “Methodology for comparing the functional performance of energy harvesting shock absorbers,” International Journal of Applied Electromagnetics and Mechanics, vol. 55, pp. 545–564, 2017.
• L. Bowen, J. Vinolas, and J. L. Olazagoitia, “Banco de ensayo para validar el modelo computacional de un cuarto de coche con amortiguador recuperador de energía,” Dyna, vol. 93, pp. 82–95, 2017.

The design of a motorcycle is characterized by the high degree of uncertainty surrounding each decision, which together with the high number of disciplines involved leads to a complex process that is subject to a high amount of dependency relationships that make it difficult to predict the impact of each action taken. This aspect has motivated the current development process to acquire an iterative structure, based on a continuous communication between the disciplines involved and strongly dependent on the experience of the engineering team in order to maximize the number of satisfactory solutions in the shortest possible time.

This problem that surrounds the current functional design process is what has motivated the objectives of this thesis. The research work of this thesis aims to establish the guidelines and foundations for the construction of an integrated and autonomous system, in which all the actions of the process are managed by decision-makers of different mathematical nature and without requiring human intervention. In this way, it is intended to leave behind the limitations of the current process and advocate for the construction of a methodology in which exploration capacity is enhanced, dependency relationships are induced by the system itself and do not require the communication of the engineering team, and in which the actions to be executed are based on functional and objective criteria.

Of all the phases of the motorcycle development process, this research work focuses on the automation and integration of all actions and evaluations inherent in the initial phases of functional design: Conceptual Design, the corresponding functional evaluations during the Calculation phase and Simulations and their 3D representation prior to the Design in Detail phase. The achievement of this work brings new knowledge about the application of artificial intelligence techniques, generative and integrated design to the world of motorcycles. Finally, in order to prove the validity and performance of the exposed methodology, its application to the functional design process of a racing motorcycle is shown.

• Revistas indexadas en JCR:
  • S. Corbera Caraballo, R. Álvarez Fernández, and J. A. Lozano Ruiz, “Integration of cutting time into the structural optimization process: application to a spreader bar design”, Struct. Multidiscip. Optim. 58, 5 (November 2018), 2269-2289.
  • S Corbera, JL Olazagoitia, JA Lozano, “Multi-objective global optimization of a butterfly valve using genetic algorithms”, ISA Transactions 63 (July 2016), 401-412
  • S. Corbera Caraballo, J. L. Olazagoitia Rodríguez, J. A. Lozano Ruiz, and R. Álvarez Fernández, “Optimization of a butterfly valve disc using 3D topology and genetic algorithms”, Struct. Multidiscip. Optim. 56, 4 (October 2017), 941-957.