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Doctorate in

Industrial and Computer Science Technology

Doctorate in Industrial and Computer Science Technology Doctorate in Industrial and Computer Science Technology

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We train researchers able to work in competitive and international environments

Industrial and Computer Science Technology are of great importance in many areas and are essential for the competitiveness of businesses. The Doctorate in Industrial and Information Technologies includes the lines of research in Industrial Technologies and Information Technologies, where several leading research issues are discussed such as the recovery of energy in vehicles, the analysis and manufacture of new materials and the application of computer science in the spatial environment, among others.

Access and admission to the Doctorate Programme

Applicants' profile

The recommended profile that grants access to the Doctorate Programme is that of a postgraduate in any speciality within Industrial Engineering (Industrial and Computer Science Technology, Mechanics, Electronics, Automobile...) or with any qualification connected to the research areas of the Programme (Computing Engineering, Telecommunications Engineering, Materials Engineering, Physical Sciences, Chemical Sciences) proving at least master level 60 ECTS credits on subjects related to those of our Doctorate Programme (Industrial Engineering in different varieties, Computing Engineering, Telecommunications Engineering, Materials Engineering, Physical Sciences, Chemical Sciences) to be assessed by the corresponding Academic Commission.

Admission requirements and criteria

In general, in order to access an official Doctorate Programme, it is necessary to own an official Spanish qualification/degree or equivalent, and a University Master (also official). Furthermore, those candidates meeting the following cases will be also admitted:

  • a) To own an official Spanish qualification/ degree, or from any other Member of the European Higher Education Area (EHEA), which enables the access to Master studies according to the article 16 of the Royal Decree 1393/2007, of the 29th October, and have passed a minimum 300 ECTS credits in their University official studies, 60 of which must belong to the Master level.
  • b) To own an official Spanish Degree qualification with a duration of at least 300 ECTS credits, according to the regulations of the European Community Law. These graduates will have to study mandatory complementary training mentioned in article 7.2 of the RD 99/2011, unless the degree's syllabus includes credits on research training, equivalent in educational value to those research credits belonging to Master studies.
  • c) Those university graduates who, having obtained a seat in the corresponding entrance test to specialized health care training, have been positively assessed for at least two training years in a programme leading to the attainment of an official qualification in any health care speciality.
  • d) To own a qualification gained according to the different foreign education systems with no type approval required, prior verification by the University of an accreditation corresponding to an equivalent training level to that of the Spanish official University Master, which enables access to Doctorate Studies in the issuing country. This admission will not involve the type approval of this prior qualification in the possession of the applicant concerned, nor its recognition for any other case but access to Doctoral training.
  • e) To own another Spanish Doctorate qualification, achieved according to the above mentioned University regulations.
  • f) To own a Bachelor's, Engineer or Architect degree/qualification, all of them prior to the RD 1393/2007 regulation, according to what is established in the regulations on equivalence of Spanish official degrees prior to those regulated y the Royal Decree 1393/2007, 29th October, pertaining the access to official Doctorate studies, regulated by the RD 99/2011, approved by the Government Commission of Antonio de Nebrija University, on 19th January, 2016.

It has It has been set the following scale to grant access to the above mentioned Doctorate Programmes:

  • [4 points] Curriculum Vitae and previous research experience of the candidate.
  • [3 points] Personal interview with the Doctorate Programme Coordinator, in which a justificatory report will be provided by the applicant. This interview could be carried out by telematic means in case the candidate is admitted in the part-time modality.
  • [3 points] Suitability of the applicant's profile for any of the research areas related to this Doctorate Programme, among those included in the OTRI register of research groups.
  • Completed and signed application
  • Updated Curriculum Vitae/Résumé
  • Certified copy of the graduate degree (or B.A.)*
  • Certified copy of the official Master Degree*
  • Certified copy of the Master's syllabus (or similar document)*
  • Photocopy of the ID card (Spaniards) or Passport (international students)
  • A passport-size photo

Send the application with all the documentation by e-mail to doctorado.tii@nebrija.es

* In the case of non-European diplomas: "apostille" in documents issued in countries that have signed the Hague Convention or legalization through diplomatic channels, in other cases
**If the documentation has not been issued in Spanish, it must be accompanied by the corresponding official sworn translation

Procedures and Assignment of Tutor and Thesis Director Academic fees of the doctoral program
  • Inscription fees: 1.550€
  • Annual supervision rights, full time: 1.100€
  • Annual supervision rights, part time: 570€
  • Thesis deposit: 1.600€
  • Issuance of the doctoral degree: 311€

For more information on fees and exemption policy, consult the following link: Doctoral School - Academic fees

Scholarships and grants

For more information about the scholarships and grants of the doctoral program, consult the following link: Escuela de Doctorate - Scholarships and grants


Doctoral School

Universidad Nebrija - Campus de la Berzosa - Calle del Hostal, s/n. 28240 Madrid escueladoctorado@nebrija.es

Director of the Doctoral School

Juan Arturo Rubio Arostegui jrubioa@nebrija.es

Secretary of the Doctoral School

Ioana Ofileanu iofileanu@nebrija.es

Coordinator of the doctoral program

Dr. Alfonso Sánchez - Macián Pérez - Campus Dehesa de la Villa – C/ Pirineos, 55 – 28040 Madrid Tfno.: 91 452 11 01 doctorado.tii@nebrija.es

Coordinator and Academic Commission
Coordinator of the doctoral program:

Dr. Alfonso Sánchez - Macián Pérez

Academic Commission:

The Academic Committee of the doctoral program referred to in Art. 8.3 of RD 99/2011, is responsible for the follow-up of doctoral students and will be responsible for training and research activities. This academic commission is made up of the following people:

  • Dr. Alfonso Sánchez - Macián Pérez (Presidente).
  • Dr. Juan Antonio Maestro de la Cuerda (Vocal del área de Tecnologías Informáticas).
  • Dr. Rafael Barea del Cerro (Vocal del área de Tecnologías Industriales).
  • Dr. Jordi Viñolas Prat (Secretario).
  • Full-time students:
    The duration of the full-time doctoral studies will be a maximum of three years, from the admission of the doctoral student into the program to the presentation of the doctoral thesis.
  • Part-time students:
    The academic commission responsible for the doctoral program may authorize the completion of part-time doctoral studies. To request this modality, candidates will have to prove some work activity. In this case, these studies may have a maximum duration of five years from admission into the program to the presentation of the doctoral thesis.
Research lines

The PhD program in Industrial and Computer Science Technology includes both the Industrial Technologies and Computer Science research lines, focusing on several research topics such as vehicle energy harvesting systems, manufacturing of new materials or the application of computer science techniques to the space environment:


Basic or General Competences

  • CB11. Systematic understanding of a field of study and mastery of research skills and methods related to that field.
  • CB12. Ability to conceive, design or create, implement and adopt a substantial research or creation process
  • CB13. Ability to contribute to the expansion of the frontiers of knowledge through original research.
  • CB14. Ability to perform a critical analysis and evaluation and synthesis of new and complex ideas.
  • CB15. Ability to communicate with the academic and scientific community and with society in general about their fields of knowledge in the modes and languages commonly used in their international scientific community.
  • CB16. Ability to promote, in academic and professional contexts, scientific, technological, social, artistic or cultural progress within a knowledge-based society.

Personal skills and abilities

  • CA01. Get along in contexts where there is little specific information.
  • CA02. Find the key questions to answer to solve a complex problem.
  • CA03. Design, create, develop and undertake new and innovative projects in their field of knowledge.
  • CA04. Work both as a team and autonomously in an international or multidisciplinary context.
  • CA05. Integrate knowledge, face complexity and make judgments with limited information.
  • CA06. The criticism and intellectual defense of solutions.
Publication requirements for defending doctoral theses

A publication in a journal indexed in the JCR index.

Educational activities

Control procedure:

Procedimiento para el control del documento de actividades de cada doctorando y la certificación de sus datos

Temporal planning:

The program includes two types of educational activities: specific and transversal

Specific training activities of this Doctorate

Date Educational activity Speaker / Trainer
23/09/2020 Seminario: 6G: Vision, Requirements, Technical Challenges, Standardization & Implementations. Recording Dr. Shahid Mumtaz
05/10/2020 Seminario: Cooperative localisation in sensor networks via iterated posterior linearisation Dr. Ángel García Fernández
16/10/2020 Seminario: AI Enhanced Intelligent Spectrum Sensing and Spectrum Awareness for 5G and beyond Dr. Miguel López Benítez
19/12/2020 Seminario: Estudio teórico-experimental y diseño de una suspensión regenerativa para motocicletas D. Alejandro González Muñoz
16/02/2021 Presentación del Programa de Doctorado Dr. Alfonso Sánchez-Macián
26/02/2021 Seminario: Magnetismo Aplicado a la Recuperación de Energía Dr. Antonio Hernando
15/03/2021 Seminario: Calculadora de Huella de Carbono Dra. Alexandra Delgado y Dr. Roberto Álvarez
17/03/2021 Seminario: Piezoelectric Energy Harvesting Dr. Mahidur Sarker
25/03/2021 Seminario: Autonomous Vehicles Dr. Francisco Badea / D. Julio Fernández
13-14/04/2021 Introducción a Simulink D. Iñaki Fernández de Bastida
14/04/2021 Introduction to Latex Dr. Ciro Moreno
16/04/2021 Competencias informacionales y recursos documentales I Dña. Pilar Jiménez
20/04/2021 Seminario: Medir para tomar decisiones. Cálculo de huella de Carbono en planes urbanísticos Dr. Mariano Oliveros / Dra. Alexandra Delgado / Dr. Sergio Zubelzu
23/04/2021 Competencias informacionales y recursos documentales II Dña. Pilar Jiménez
28/04/2021 Seminario: Beyond Silicon Machines: The Computers in a New Era Dr. Omar P. Vilela
29/04/2021 Research Plan. Planificación de la Investigación. El Plan de Investigación Dr. Alfonso Sánchez-Macián
12/05/2021 Seminario: NextGear Project Dr. Ingo Kaiser
19/05/2021 Seminario: Metal 3D Printing Dr. Rafael Barea

Transversal educational activities of the Doctoral School

The planning of the transversal educational activities organized by the Doctoral School, can be consulted in the following link: Doctoral School: training

Regulations and Procedures PhD candidate guide Infrastructures, material resources and support services

Industrial and Computer Science Technology Group

Juan Antonio Maestro Dr. Juan Antonio Maestro de la Cuerda Juan Antonio Maestro holds a M.Sc. degree in Physics (1994) and a PhD degree in Computer Engineering from Universidad Complutense de Madrid (1999). He has served both as a lecturer and researcher at several universities, as Universidad Complutense de Madrid, UNED, Saint Louis University and Universidad Antonio de Nebrija, where he currently directs the ARIES research center (http://www.nebrija.es/aries).
His current activities are oriented to the Space field, with several research projects on reliability and radiation protection. In this way, his areas of interest include different subjects as Digital Design, Computer Architecture, High Level Synthesis and co-Synthesis, Fault-tolerance and Reliability. He has co-authored more than 150 publications, both in journals and international conferences, as well as some patents in the field of fault-tolerant digital circuits. He collaborates with universities and research centers worldwide, as Stanford University, the European Space Agency, University College Dublin or the Harbin Institute of Technology.
Jordi Viñolas Dr. Jordi Viñolas Prat En la actualidad profesor y director de la Escuela Politécnica Superior de la Universidad Nebrija. Ha sido el Director del Departamento de Ingeniería Mecánica de la Escuela de Ingenieros TECNUN de la Universidad de Navarra de octubre 2005 a julio de 2012, así como el Director del Departamento de Mecánica Aplicada del CEIT, centro de investigación, hasta noviembre de 2012.
Titulado en Ingeniería Mecánica por la Universidad de Navarra, obtuvo el doctorado en la misma institución en 1991. Sus intereses científicos se han centrado en los campos de la dinámica de máquinas, el ruido y las vibraciones, dinámica ferroviaria e interacción con la infraestructura. Ha publicado cerca de 60 artículos científicos en revistas indexadas en áreas tales como el análisis estructural, la dinámica de vehículos, suspensiones activas, trenes basculantes, reducción de ruido, la interacción rueda/carril y otros aspectos relacionados con la optimización de los componentes de los vehículos y máquinas, y 46 comunicaciones en Congresos Internacionales/Nacionales.

El profesor Viñolas ha dirigido/codirigido 16 Tesis doctorales (además de tres en curso) y más de 50 tesis máster/proyectos fin de carrera. Las asignaturas que ha impartido son: Elementos de máquinas, Calculo Diseño y Ensayo de Máquinas (Grado) y Ruido y Vibraciones, Ingeniería del transporte y Dinámica Avanzada de Máquinas y motores (Posgrado). Estuvo implicado directamente en la adaptación del plan de estudios de la Escuela de Ingenieros para el nuevo proceso de Bolonia. También en la puesta en marcha de tres nuevos grados que dependen directamente del Departamento de Ingeniería Mecánica: Ingeniería en Tecnologías Industriales, Ingeniería Mecánica e Ingeniería en Diseño Industrial y Desarrollo de Producto. Obtuvo la acreditación como profesor catedrático de la ANECA (Agencia Nacional de Evaluación de la Calidad y Acreditación) en septiembre de 2010.

Ha trabajado como evaluador de la Comisión Europea para varios programas marco europeos de investigación (6º y 7º Programa Marco, H2020 y de la iniciativa Shif2Rail), y fue uno de los promotores y ha sido el representante del CEIT en EURNEX (European Rail Research Network of Excellence), y por tanto en contacto con los investigadores más relevantes del área ferroviaria. Es miembro del Consejo Editorial de la Revista IMech Journal of Rail and Rapid Transit, y miembro del Consejo Editorial de la Revista International Journal of Rail Transportation (IJRT).
Fue el promotor de Lander Simulation and Training Solutions, un exitoso spin-off que se creó en el año 2002, una compañía que ahora opera a nivel mundial especializada en el diseño, desarrollo e implantación de dispositivos de simulación comercial con fines de formación (http://www.iesep.com/es/jordi-vi-olas-recruitment-for-new-spin-off-a-10638.html) Fue uno de los iniciadores y durante casi diez años, el responsable del laboratorio de ferrocarriles CAF/CEIT/TECNUN, parte de un acuerdo a largo plazo con el fabricante de material rodante CAF. En Nebrija puso en marcha en 2015 la Cátedra Global Nebrija- Santander en Transporte Sostenible, con la idea de impulsar proyectos de investigación en este campo, becar Proyectos fin de máster y de grado, dotar de equipamiento y software, y la Organización de Conferencias y Congresos.
Rafael Barea Dr. Rafael Barea del Cerro PhD from the UAM, Engineering degree in Materials from the UPM, Bachelor's degree in Physical Sciences and Associate's degree in Teaching from the UCM. University specialist in finite elements in thermal problems from the UNED. Over 10 years of research experience in different CSIC centers and at Nebrija University. An associate professor through ANECA, he has three six-year periods research. Specialties: processing and characterization of ceramic and metallic materials, in mathematical models and simulation (neural networks, fuzzy logic, finite elements, modeling of non-linear properties of materials...). He is currently working in the area of additive manufacturing in stainless steel and on the mechanical properties of magnesium alloys oriented towards manufacturing parts for the transportation industry (airplanes, trains, ships and automobiles). Roberto Alvarez Dr. Roberto Álvarez Fernández Doctor en Ingeniería industrial especialidad en ingeniería de los procesos de fabricación. Ingeniero Industrial especialidad en electrotecnia y especialidad en organización de la producción. Profesor acreditado en las figuras de contratado doctor y profesor de universidad privada. 17 años de experiencia docente y 10 años de experiencia investigadora. Cuenta con un sexenio de investigación, más de 500 citas en el Google Scholar Citations, 19 artículos en revistas indexadas en el JCR (Journal Citations Reports) de los cuales 12 corresponden al primer cuartil (Q1). Ha publicado dos libros con la editorial Springer y numerosos capítulos de libros, participaciones en congresos y charlas, tanto nacionales como internacionales. Su línea de investigación se centra en la optimización en el uso de las infraestructuras urbanas y el consumo de energía, incluyendo la actividad industrial, la movilidad y la cuantificación de las emisiones de gases de efecto invernadero debida a dichas actividades.
Jose Luis Olazagoitia Dr. Jose Luis Olazagoitia Rodríguez En la actualidad Director del Grado de Ingeniería del Automóvil en la Escuela Politécnica Superior de la Universidad Nebrija, IP del Grupo de Nebrija de Ingeniería de Vehículos y miembro del Comité Técnico de Producción en Automoción en la ASEPA (Asociación Española de Profesionales de Automoción). Participa además como Experto Técnico en Certificación de proyectos de I+D+i para empresas y para el MINECO.
En la actualidad Profesor y Coordinador de asignaturas en la Escuela Politécnica Superior: “Cálculo de Estructuras”, “Cálculo, Diseño y Ensayo de Máquinas”, “Ingeniería Asistida por Ordenador”, “Teoría de Máquinas”, “Teoría de Vehículos”, “Reglamentación”, “Calidad en la Industria del Automóvil”, “Sistema de Vehículos y Componentes I y II”, “Construcción e Infraestructuras”, “Plantas Industriales”.
Ha sido Responsable del Área de Mecánica Computacional en el Centro de Investigación del Automóvil de Navarra (CITEAN) de mayo de 2009 a mayo de 2012 dirigiendo las líneas de actividad de optimización y análisis estructural, cinemática y dinámica. Investigador principal en el proyecto QUIET y STEAM (Gobierno de Navarra) en “Eliminación de ruidos en sistemas de freno” y “Simulación virtual de la dinámica vehicular centrado en el comportamiento de elastómeros”.
Anteriormente fue Director Industrial, Director Técnico y Director de I+D+i en la empresa PKMTricept SL perteneciente en la actualidad al Grupo LOXIN, de noviembre de 2004 a mayo de 2009. La empresa fabrica manipuladores flexibles basados en cinemática paralela dentro del sector de la máquina herramienta.
Anteriormente fue Administrador de Sistemas de Ingeniería e Ingeniero de Producto de la empresa DANA Spicer Commercial Vehicle System Division en Pamplona, de Junio de 1999 a noviembre de 2004. Responsable de la implantación de la QS9000 en la ingeniería, así como APQP leader en el desarrollo de ejes motrices para camiones de hasta 18 Tn.
Ingeniero Industrial con especialidad Mecánica por la Universidad de Navarra, obtuvo el doctorado en la misma institución en 1999.
Sus intereses científicos se han centrado en la optimización aplicada al diseño de máquinas y mecanismos, con especial interés en los robots de cinemática paralela y máquina herramienta. Entre ellos destaca la aplicación de técnicas de simulación computacional (elementos finitos, cinemática y dinámica, CFD, inteligencia artificial) y validación de las mismas a través de ensayos. Sus intereses también se centran en el campo de la robótica industrial, en la simulación computacional, en el ruido y vibraciones en vehículos, el diseño de frenos y suspensiones, recuperación de energía y en la interacción del vehículo con el entorno.
A raíz de su experiencia práctica industrial e investigadora, tiene amplios conocimientos en diseño CAD, cálculos FEM, simulación multi-cuerpo MDB, inteligencia artificial y en el desarrollo de sistemas embarcados e instrumentación de vehículos para adquisición de datos en campo, desarrollo de pruebas en bancos de ensayos y validación de modelos.
Alfonso Sánchez-Macian Dr. Alfonso Sánchez-Macian Perez Alfonso Sánchez-Macián received the M.Sc. and PhD degrees in telecommunications engineering from Universidad Politécnica de Madrid in 2000 and 2007, respectively. He has worked as a Lecturer and a Researcher at several universities, such as the Universidad Politécnica de Madrid; IT Innovation Centre; University of Southampton, Southampton, U.K.; and the Universidad Antonio de Nebrija, Madrid. At Universidad Antonio de Nebrija, he was appointed as CIO (2010-2014), Vice Rector for Education and Academic Affairs (2013-2015) and Director of the Computer Engineering Program (2016-2018). He previously worked in numerous national and multinational companies as a Project Manager and a Senior Consultant for IT projects.
In terms of research, he has published 16 papers in JCR-indexed journals (12 of them in the last 3 years, 4 in the first quartile), a book chapter (Wiley) and several publications in congresses and workshops. He has taken part in 8 research projects and 1 R+D contract. He was awarded by the Official College of Telecommunication Engineers with the Prize to the best Thesis in the topic of Management and regulation of Telecommunications. He is currently part of the ARIES (Aerospace Research and Innovation in Electronic Systems) Research Center, where he focuses on fault tolerance in electronic systems and processor in the Space environment.
Regarding teaching duties, he has taught more than 1200 hours of lectures at the university at bachelor and master levels, in Computer Engineering, Industrial Engineering, Telecommunication Engineering, Business Administration, Tourism and Marketing degrees. He is currently Director for the Industrial Technology PhD program.
Francisco Miguel García Dr. Francisco Miguel García Herrero Since 2011, the main research line is the design and implementation of algorithms and hardware architectures for Forward Error Correction (FEC) codes required in modern communication and storage systems, such as flash memories, satellite decoders and long- haul optical fiber-optic networks. The research is focused on:
• Low density binary decoders, LDPC
• Low-density non-binary parity code decoders, NB-LDPC
• Polar codes decoders
• Soft decoding of the Reed-Solomon codes
The objective is to improve the performance of the decoders trying to balance coding gain, throughput, latency and area resources, by means of reducing complexity in decoding algorithms with a negligible loss in error correction. In addition, solutions to mitigate the error floor effect of low complexity algorithms based on majority logic decoding have been studied through real implementations in field-programmable gate array (FPGA) of several decoder architectures.
Related to these topics, more than fifteen articles have been published in journals included in the Journal Citation Reports (JCR) in the field of Electrical and Telecommunications Engineering (Q1-Q2). In addition, a patent for the architecture of a new decoding algorithm for non-binary LDPC codes, which can be applied to fault-tolerant flash memories and other modern storage devices, was registered. All this production is supported by competitive projects of the Spanish Government (3 projects since 2009) and drove international collaborations with the Equipes Traitement de l'Information et Systèmes (Ecole Nationale Supérieure de l’Electronique et de ses Applications), the Department of Electrical and Computer Engineering (University of California) and School of Electrical and Electronic Engineering (University College Dublin). Medium and long term research will continue with error correction decoders and fault tolerance processing architectures for high-performance systems in order to provide new algorithms and designs to satisfy the requirements of demanding areas such as space technology.

External professors

Dr. Chris Bleakley Dr. Chris Bleakley Chris Bleakley holds a B.Sc.(Hons) degree in Computer Science (1990) from Queen’s University Belfast and a Ph.D. degree in Electronic Engineering (1995) from Dublin City University. He is currently an Associate Professor in the School of Computer Science at University College Dublin (UCD). His research focuses on computational sensing - algorithms for processing signals from real-world sensors including image, video, speech, audio, ultrasonic, EEG, and radio signals - and fault tolerant computing. To date, he has published over 120 papers and graduated 12 Ph.D. students. Prior to joining UCD in 2003, Dr Bleakley was Vice-President of Engineering with Massana Ltd., a research-lead fabless semiconductor company. Dr Bleakley managed a multi-disciplinary, multi-site team comprising up to 50 engineers to deliver Massanas Gigabit Ethernet over copper Physical Layer Integrated Circuit products. He has also held positions at Accenture, Broadcom Eireann, and BIS Beecom. Dr. Pedro Reviriego Vasallo Dr. Pedro Reviriego Vasallo Pedro Reviriego received the MSc and PhD Hons. degrees in telecommunications engineering from the Technical University of Madrid, Madrid, Spain, in 1994 and 1997, respectively. From 1997 to 2000, he was an R&D engineer with Teldat, Madrid, working on router im plementation. In 2000, he joined Massana to work on the development of Ethernet transceivers. During 2003, he was a visiting professor with the Universidad Carlos III de Madrid, Leganés, Spain. From 2004 to 2007, he was a distinguished member of the technical staff with LSI Corporation, working on the development of Ethernet transceivers. From 2007 to 2018 he worked at Universidad Nebrija and was part of the ARIES Research Center. He is currently with Universidad Carlos III de Madrid. He is the author of numerous papers in international conference proceedings and journals. He has also participated in IEEE 802.3 standardization activities. His research interests include fault-tolerant systems, communication networks, and the design of physical-layer communication devices. He is a senior member of the IEEE. Dra. Ana Romero Dra. Ana Romero Doctora en Ingeniería Industrial por la Universidad de Castilla La Mancha. Colaboración en varios proyectos de investigación y en proyectos de innovación docente, participación en más de 18 congresos en el ámbito nacional e internacional y en numerosas publicaciones en revistas científicas internacionales. Premio Airbus al mejor proyecto fin de carrera y obtención de becas competitivas. En la actualidad es profesora ayudante doctora en la Universidad de Castilla La Mancha.


The research lines of this program have a high potential for labor insertion


Thus, on the one hand, Automobile Engineering is a growing line in Spain. This sector generates approximately 10% of GDP and also represents 17% of the country's exports. Spanish production plants are among the most automated in Europe, with high investment rates. Regarding R&D, the sector has an important network of automotive centers and clusters, with 34 technological centers related to vehicle production.


On the other hand, the line of research in Electronics provides a large number of possibilities for the training of doctoral students and their insertion in the labor market. Technology areas are usually among the most sought out, and where a greater number of well-trained professionals is required. Specifically, Electronics stands out for its great transversality, being present in most industrial applications: from pure computer systems to Space applications, including process automation.


Finally, the same can be said of the Materials line, on which there is an increasing interest from the industry. The Materials profile is one of the most demanded internationally, with a great projection in research, innovation and development matters.

Graduates will be able to develop their professional career in the Research and Development departments of companies related to cars, electronics or materials. Technology or research centers and universities are another career opportunity for graduates of this program.


Organizations and entities Description of the agreement
Center for Environmental and Technological Energy Research (CIEMAT) Educational Cooperation Agreement regarding Collaboration in Undergraduate/Postgraduate Studies
Center for Environmental and Technological Energy Research (CIEMAT) Framework Collaboration Agreement
Higher Center for Scientific Research (CSIC) Educational Cooperation Agreement for the development of PhD programs
Instituto Nacional de Técnica Aeroespacial Esteban Terradas (INTA) Framework collaboration agreement in the field of scientific research and technological development
National Institute of Aerospace Technology Esteban Terradas (INTA) Specific collaboration agreement for the creation of a joint research unit (Joint Research Unit on research in electronic systems)
Complutense University of Madrid (UCM) Applied Magnetism Institute (IMA) Research contract Applied Magnetism Institute
Stirling Center Framework collaboration agreement for the granting of a scholarship for research staff in training
Stirling Center Framework collaboration agreement in relation to academic, cultural or training programs


Scholarship-holding researchers in training

Nebrija Research Scholarships Funded by the Vice Rector for Research
  • Aranda Barjola, Luis A
  • Bowen Aguayo, Lincoln E
  • Iniesta Barbera, M Carmen
  • Sanchez Avila, David
  • Clar, Francesc
  • Gonzalez Muñoz, Alejandro
  • Mohseni, Zeynab
  • García Alonso, María Sonsoles
  • Díaz Luque, Omar
  • Gear, Kyle W.
Nebrija Research Scholarships Attached to projects
  • Chair Scholarship. Corbera, Sergio. Global Nebrija-Santander Chair in Sustainable Transportation.
  • MINECO Predoctoral Contract. Ramos Amo, Alexis. Design, implementation and test of fault tolerance techniques on multi-core systems for on-board Space applications (RadMultiCore)", ESP2014-54505-C2-1-R.
  • Gonzalez Toral, Ricardo. Spanish Ministry of Economy and Competitiveness. "Space Ethernet Physical Layer Transceiver (SEPHY)", Horizon 2020 (European Commission).
  • Kiani, Vahdeneh. Spanish Ministry of Economy and Competitiveness. "Space Ethernet Physical Layer Transceiver (SEPHY)", Horizon 2020 (European Commission).

Defended Doctoral theses

Design and implementation of test of fault tolerance techniques for the use of a Microprocessor on Space Missions
  • Doctorando: Alexis Ramos Amo
  • Fecha de lectura: 18 de mayo de 2018.
  • Resumen:

    Desde el inicio de la carrera espacial, la informática y la electrónica que forman parte de este sector han experimentado un gran y rápido avance, convirtiéndose además en una pieza importante de las misiones actuales. No obstante, a medida que esta tecnología ha evolucionado, también lo han hecho los retos a los que tiene que enfrentarse como por ejemplo, los errores producidos por la radiación cósmica. Es por esto, que nuevas y eficientes técnicas de protección son necesarias en los citados sistemas para hacer posible su correcto funcionamiento en un entorno espacial.

    Tradicionalmente, esta tarea se ha realizado mediante procesos de fabricación que crean versiones protegidas de los transistores y otros elementos que componen la plataforma electrónica. A este proceso se le conoce como protección (RadHard). Esta técnica da buenos resultados de fiabilidad pero es costosa de fabricar, lo que implica que solo las agencias espaciales y las grandes corporaciones que dispongan de un presupuesto holgado, pueden acceder a ella. Este motivo económico impide por tanto a universidades, centros de investigación y otras instituciones el poder desarrollar sus propias investigaciones espaciales. Como respuesta a este impedimento, en los últimos años ha surgido una nueva alternativa a la fabricación RadHard, que consiste en usar componentes comerciales adaptados a las necesidades del sector espacial mediante técnicas de protección ad-hoc. El uso de esta tecnología conocida como “Commercial-Off-The-Shelf” (COTS), ha supuesto un gran cambio en el diseño electrónico espacial debido al abaratamiento de los costes de diseño y fabricación. Gracias a esto, la barrera económica que impedía a universidades y centros de investigación crear sus propias misiones espaciales está siendo superada. Esto ha propiciado la aparición de nuevas aplicaciones como los satélites de bajo coste del tipo “Nanosat” y los “Picosat”.

    Existen dos formas de implementar el diseño de un circuito electrónico. La primera forma es fabricar un chip en silicio según la especificación. Este circuito recibe el nombre de “Application-Specific Integrated Circuit” (ASIC). La segunda opción es usar una plataforma programable como por ejemplo una “Field Programmable Gate Array” (FPGA). Este dispositivo está formado por celdas que implementan funciones lógicas, así como memorias y otros elementos electrónicos que implementan la función lógica de un circuito descrito mediante un lenguaje de diseño hardware o “Hardware Description Language” (HDL). Las FPGAs destacan frente a los “ASIC” en que son programables, lo que permite modificar el diseño del circuito para hacerlo tolerante a fallos, actualizarlo una vez cargado y reducir el tiempo necesario de implementación. Todas estas características evitan tener que construir un chip en silicio (ASIC), abaratando por tanto los costes.

    Los microprocesadores son una parte crucial en cualquier misión espacial. Desde la carga propia de la misión como pueda ser el instrumental científico, hasta los sistemas de navegación, pasando por los de comunicación con la Tierra, los microprocesadores son usados para múltiples funciones. Existen dos tipos de microprocesadores: los “Soft-Core” o “Soft Processor”, que implementan en una FPGA un diseño descrito en “HDL” y los “Hard Processor”, fabricados en un ASIC. Aquellos que son sintetizados en un dispositivo programable, se ven beneficiados por las ventajas anteriormente mencionadas de las FPGAs, como por ejemplo, la opción de personalización del diseño según las necesidades de la aplicación, o la capacidad de exportación de este a otra placa. Dichos procesadores, igual que cualquier elemento electrónico en un vehículo espacial, deben ser protegidos frente a los efectos adversos de la radiación. Esta protección puede realizarse mediante el uso de una FPGA RadHard, mediante una modificación del diseño, o mediante la combinación de ambas técnicas para lograr una protección mayor.

    La presente tesis aborda el uso de los microprocesadores embarcados en misiones espaciales en FPGAs de tipo comercial, tomando como caso de estudio un “soft processor” de arquitectura RISC-V. Esta arquitectura se distingue por ser abierta, lo que facilita y abarata el desarrollo de un diseño, que junto a otras características propias de ella, la convierte en una candidata ideal para este trabajo. El microprocesador utilizado en los procesos experimentales ha sido implementado en una FPGA. La aportación de la presente tesis radica en dos aportaciones: la primera, en la caracterización de un “soft processor” de arquitectura RISC-V frente a errores aislados para determinar su tolerancia a fallos. La segunda, en la propuesta de dos técnicas de protección de los componentes del microprocesador anteriormente analizado, que usando las ventajas de la implementación en un dispositivo programable, protege dichos módulos de una forma más eficiente que otras soluciones.

  • Publicaciones:
    • Revistas indexadas en JCR:
      • A. Ramos, A. Ullah, P. Reviriego, and J. A. Maestro. “Efficient Protection of the Register File in Soft-Processors Implemented on Xilinx FPGAs”. In: IEEE Transactions on Computers 67.2 (Feb. 2018), pp. 299–304. ISSN: 0018-9340. DOI: 10.1109/TC.2017.2737996
      • A. Ramos, J. A. Maestro, and P. Reviriego. “Characterizing a RISC-V SRAM-based FPGA implementation against Single Event Upsets using fault injection”. In: Microelectronics Reliability 78 (Nov. 2017), pp. 205–211. ISSN: 0026-2714. DOI: 10.1016/j.microrel.2017.09.007
High-Level Methodologies to Implement Energy Efficient Fault Tolerant Registers
  • Doctorando: Ricardo González Toral
  • Fecha de lectura: 6 de abril de 2018
  • Resumen:

    Debido a la continua miniaturización de los componentes electrónicos, su susceptibilidad frente a soft errors inducidos por radiación ha ido aumentando durante los últimos años. Este obstáculo es de vital importancia para el uso de estos elementos en aplicaciones espaciales, ya que se encuentran expuestos a numerosas fuentes de partículas radiactivas. Para compensar esta carencia, a lo largo de los años se han desarrollado numerosas técnicas de tolerancia a fallos. Estas soluciones se clasifican habitualmente en técnicas de prevención de fallos, que emplean componentes resistentes a radiación para prevenir la ocurrencia de errores, y técnicas de mitigación de fallos, que hacen uso de funciones lógicas para detectar o corregir los errores una vez que se han producido. La efectividad de las primeras se está viendo reducida con los avances tecnológicos, mientras que las últimas tienen un efecto considerable en el retardo, el área y el consumo energético del sistema.

    El consumo energético es otro de los grandes desafíos de la electrónica en la actualidad. Debido al auge de los dispositivos alimentados por baterías, la reducción del consumo medio de los circuitos ha adquirido una importancia capital. Esta situación es especialmente relevante para sistemas espaciales, donde la disponibilidad de fuentes de energía es escasa. Dado el reciente interés en el uso de nanosatélites, la importancia de diseñar circuitos capaces de operar a bajo consumo ha aumentado aún más, ya que un factor limitante para estos vehículos es precisamente el consumo. Desgraciadamente, los circuitos que se encuentran en estos satélites también deben contar con medios de protección contra radiación para garantizar el éxito de la misión.

    En esta tesis se evaluará la condición de equilibrio establecida entre área y consumo en registros tolerantes a fallos. A través de un estudio preliminar de varias técnicas de mitigación de soft errors cuyas características son representativas del conjunto, el conocimiento necesario para determinar la efectividad de cada técnica será adquirido.

    Este conocimiento será luego empleado para proponer dos metodologías novedosas destinadas a reducir el consumo energético en registros tolerantes a fallos. La primera de estas se centra en alcanzar una solución de compromiso entre el retardo, el área y el consumo energético que permita al diseñador adaptar la protección del sistema a los requerimientos de diseño. Esta metodología emplea únicamente el número de biestables a proteger y la actividad de cada uno de estos para proponer una solución alternativa.

    La segunda metodología expone la importancia del orden de las entradas de un código de corrección de errores en su consumo energético medio. Basándose en la descripción a nivel de registros y de puertas del sistema, se proponen una serie de pasos a ejecutar para reducir la actividad global del diseño. Aplicando estos pasos, las entradas al codificador se reordenan de forma rápida para reducir el consumo medio del diseño, lo que hace esta metodología adecuada para su uso en registros en sistemas complejos.

    A través de la comprensión previamente adquirida del consumo en registros tolerantes a fallos, se ha desarrollado un estimador de área y consumo para estos sistemas. Este estimador utiliza como entradas la longitud del registro y la actividad media de sus entradas, y proporciona como salidas una estimación del área y el consumo de este registro protegido empleando varias técnicas de tolerancia a fallos. La evaluación de los resultados muestra que los valores predichos por el estimador cometen un error relativo de menos del 5% respecto a los valores determinados a través de la síntesis y simulación del circuito, mientras que el tiempo necesario para obtener estos se ve enormemente reducido.

  • Publicaciones:
    • Revistas indexadas en JCR:
      • R. González Toral, P. Reviriego, J.A. Maestro and C. Argyrides, "A Fast Technique to Reduce Power Consumption on Linear Block Codes Used to Protect Registers", IEEE Transactions on Device and Materials Reliability (ISSN: 1530-4388), 2018 (in press).
      • R. González Toral, P. Reviriego, J.A. Maestro and Z. Gao, "A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-based FPGAs", IEEE Transactions on Computers (ISSN: 0018-9340), 2018 (in press).
      • R. González Toral, P. Reviriego, S. Liu and J.A. Maestro, “Reducing the Power Consumption of Fault Tolerant Registers Through Hybrid Protection", IEEE Transactions on Circuits and Systems I: Regular Papers (ISSN: 1549-8328), vol. 65, no. 4, pp. 1293-1302, April 2018.
    • Congresos:
      • R. González Toral, P. Reviriego, J.A. Maestro and Z. Gao, "A Novel Concurrent Error Detection Technique for the Fast Fourier Transform Implemented in SRAM-based FPGAs", Proc. of the RADECS 2016 conference, Bremen (Germany), September 2016.
Design and Implementation of a Fault-Tolerant Star Tracker Image Processing System in an SRAM-based FPGA
  • Doctorando: Luis Alberto Aranda Barjola
  • Fecha de lectura: 17 de enero de 2018
  • Resumen:

    Star trackers are autonomous, high-accuracy electronic systems used to determine the attitude of a spacecraft. Typical star tracker systems can weigh from 1 to 7 kilograms and consume up to 15 watts of power. These technical specifications imply a high demand of weight and power that small spacecraft such as picosats or CubeSats cannot afford. Therefore, classic star trackers are not yet suitable for these smallsat applications.

    In recent years, Commercial Off-The-Shelf (COTS)-based star trackers are growing in importance for low-cost and short-duration missions due to the emergence of the previously mentioned small-size spacecraft. The current trend in COTS electronic devices is to increase component density and functionalities, so they are interesting alternatives to implement complex attitude determination algorithms. However, electronics miniaturization also makes these devices more susceptible to radiation-induced errors caused by ionizing radiation. Energetic particles can collide with the transistors of the device leading to e.g. Single-Event Upsets (SEUs), a type of error that modifies the value of a memory cell. Consequently, COTS components are not fully prepared to operate in space applications.

    In order to mitigate these radiation effects in electronic devices, expensive manufacturing processes can be used. However, this approach is inconsistent with low-cost COTS-based projects, so a Radiation Hardening by Design (RHBD) approach is usually followed. Typically, when the complexity and heterogeneity of the system that is going to be implemented in the COTS component is high, classic protection schemes based on modular redundancy are chosen to shorten development times.

    The main drawbacks of the previously mentioned approaches are related to the high resource usage and power consumption. In this thesis, a divide-and-conquer approach combined with ad-hoc protection techniques is presented to create a fault tolerant image processing system of a COTS-based star tracker. The image processing system has been divided into smaller and less complex modules with homogeneous properties that have been protected using custom techniques. These techniques have been developed to obtain the right balance between the resource overhead added to the unprotected design and the final error detection/correction rate achieved.

    The effectiveness of the combined strategy proposed in this thesis has been validated creating a completely functional image processing system of a star tra-cker. The protected system has been evaluated in terms of resource usage, error detection rate, and reconfiguration rate obtaining positive results. The number of undetected errors achieved is similar to classic redundancy-based approaches, but it uses fewer FPGA resources and requires fewer unnecessary reconfigurations. Moreover, the effect of the undetected errors has been measured to verify that they do not heavily affect the subsequent star identification algorithms. Therefore, it can be concluded that the proposed ``divide-and-conquer'' approach combined with ad-hoc protection techniques can be used to adapt the fault tolerance of a complex system to the mission requirements. In particular, a fault tolerant image processing system based on COTS components has been successfully designed and implemented using this approach.

  • Publicaciones:
    • Revistas indexadas en JCR:
      • L. A. Aranda, P. Reviriego, and J. A. Maestro, "A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response (FIR) Filters Implemented in SRAM-based FPGAs through Fault Injection", IEEE Transactions on Circuits and Systems II (ISSN: 1549-7747), Vol. 65, No 3, March 2018, pp. 376-380.
      • L. A. Aranda, P. Reviriego, and J. A. Maestro, "Error Detection Technique for a Median Filter", IEEE Transactions on Nuclear Science (ISSN: 0018-9499), Vol. 64, No 8, August 2017, pp. 2219-2226.
      • L. A. Aranda, P. Reviriego, R. G. Toral, and J. A. Maestro, “Protection Scheme for Star Tracker Images,” IEEE Transactions on Aerospace and Electronic Systems, 2018 (in press).
    • Congresos:
      • L. A. Aranda, P. Reviriego, and J. A. Maestro, “A Fault-Tolerant Implementation of the Median Filter,” in Proc. of the RADECS 2016 Conf., Bremen (Germany), September 19-23, 2016.
      • L. A. Aranda, P. Reviriego, and J. A. Maestro, “Design Placement Guidelines for Single Event Upset (SEU) Minimization in SRAM-based FPGAs,” in XXXII Conf. on Design of Circuits and Integrated Systems (DCIS), Barcelona (Spain), November 22-24, 2017.
Theoretical-experimental study of energy recovery systems in the suspension of a motor vehicle
  • Doctorando: Lincoln Emilio Bowen Aguayo
  • Fecha de lectura: 6 de julio de 2018
  • Resumen:

    Esta tesis contiene un estudio del estado del arte sobre los EHSAs (Energy Harvesting Shock Absorbers) exhaustivo, clasificando cada una de las tecnologías que se presentan en la literatura según el principio de funcionamiento. Se muestran datos de la potencia de los sistemas desarrollados por cada autor, así como también sus eficiencias, su fuerza de amortiguamiento o sus coeficientes de amortiguamiento.

    Los estudios llevados a cabo dentro del contexto de esta tesis están centrados, primero, en plantear una metodología que permita comparar las distintas tecnologías existentes, entre sí.

    En segundo lugar, aplicando esta metodología a los sistemas que mayor impacto han tenido en la literatura, se proponen modelos matemáticos y computacionales para su posterior simulación. En estos modelos se analizan las deficiencias y virtudes de cada sistema lo que permite plantear una propuesta alternativa a las presentadas en la bibliografía.

  • Publicaciones:
    • L. Bowen, J. Vinolas, and J. L. Olazagoitia, “Methodology for comparing the functional performance of energy harvesting shock absorbers,” International Journal of Applied Electromagnetics and Mechanics, vol. 55, pp. 545–564, 2017.
    • L. Bowen, J. Vinolas, and J. L. Olazagoitia, “Banco de ensayo para validar el modelo computacional de un cuarto de coche con amortiguador recuperador de energía,” Dyna, vol. 93, pp. 82–95, 2017.
Integrated Methodology for the Autonomous Management of the Functional Design Process of a Motorcycle based on Generative Systems and Evolutionary Techniques.
  • Doctorando: Sergio Corbera Caraballo
  • Fecha de lectura: 19 de junio de 2019.
  • Resumen:

    The design of a motorcycle is characterized by the high degree of uncertainty surrounding each decision, which together with the high number of disciplines involved leads to a complex process that is subject to a high amount of dependency relationships that make it difficult to predict the impact of each action taken. This aspect has motivated the current development process to acquire an iterative structure, based on a continuous communication between the disciplines involved and strongly dependent on the experience of the engineering team in order to maximize the number of satisfactory solutions in the shortest possible time.

    This problem that surrounds the current functional design process is what has motivated the objectives of this thesis. The research work of this thesis aims to establish the guidelines and foundations for the construction of an integrated and autonomous system, in which all the actions of the process are managed by decision-makers of different mathematical nature and without requiring human intervention. In this way, it is intended to leave behind the limitations of the current process and advocate for the construction of a methodology in which exploration capacity is enhanced, dependency relationships are induced by the system itself and do not require the communication of the engineering team, and in which the actions to be executed are based on functional and objective criteria.

    Of all the phases of the motorcycle development process, this research work focuses on the automation and integration of all actions and evaluations inherent in the initial phases of functional design: Conceptual Design, the corresponding functional evaluations during the Calculation phase and Simulations and their 3D representation prior to the Design in Detail phase. The achievement of this work brings new knowledge about the application of artificial intelligence techniques, generative and integrated design to the world of motorcycles. Finally, in order to prove the validity and performance of the exposed methodology, its application to the functional design process of a racing motorcycle is shown.

  • Publicaciones:
    • Revistas indexadas en JCR:
      • S. Corbera Caraballo, R. Álvarez Fernández, and J. A. Lozano Ruiz, “Integration of cutting time into the structural optimization process: application to a spreader bar design”, Struct. Multidiscip. Optim. 58, 5 (November 2018), 2269-2289.
      • S Corbera, JL Olazagoitia, JA Lozano, “Multi-objective global optimization of a butterfly valve using genetic algorithms”, ISA Transactions 63 (July 2016), 401-412
      • S. Corbera Caraballo, J. L. Olazagoitia Rodríguez, J. A. Lozano Ruiz, and R. Álvarez Fernández, “Optimization of a butterfly valve disc using 3D topology and genetic algorithms”, Struct. Multidiscip. Optim. 56, 4 (October 2017), 941-957.
Dr. Alfonso Sánchez-Macian Perez CONTACT

PhD. Alfonso Sánchez-Macian Perez

Coordinator of Doctorate in Industrial and Computer Science Technology Email: doctorado.tii@nebrija.es

News in Industrial and Computer Science Technology

Engineering Week of the Higher Polytechnic School

They addressed issues such as Intelligent and Innovative Mobility, New Technologies in Cities and Transportation Networks, or Science to Explain the World. Finishing with the Employment Forum in which companies such as Iberdrola, Ikea, Hyunday or Deloitte parcipated.